author | Icenowy Zheng <icenowy@aosc.io> | |
Wed, 19 Dec 2018 02:18:47 +0000 (10:18 +0800) | ||
committer | Icenowy Zheng <icenowy@aosc.io> | |
Wed, 19 Dec 2018 23:56:15 +0000 (07:56 +0800) | ||
commit | 90d00182cfe358438d777f2ca7abacb4c6a2733c | |
tree | 5af285a46aa934a6b8b3a1aa316a26983a1054f4 | tree |
parent | 93d44bb9a613b46a80642b8ce71295db18fadbc5 | commit | diff |
techlibs/anlogic/Makefile.inc | diff | blob | history | |
techlibs/anlogic/anlogic_determine_init.cc | [new file with mode: 0644] | blob |
techlibs/anlogic/dram_init_16x4.vh | [new file with mode: 0644] | blob |
techlibs/anlogic/drams.txt | diff | blob | history | |
techlibs/anlogic/drams_map.v | diff | blob | history | |
techlibs/anlogic/synth_anlogic.cc | diff | blob | history |