arch-arm: Correction for address size in EL1&0 translation
authorAnouk Van Laer <anouk.vanlaer@arm.com>
Tue, 4 Sep 2018 10:44:42 +0000 (11:44 +0100)
committerAnouk Van Laer <anouk.vanlaer@arm.com>
Thu, 13 Sep 2018 09:08:19 +0000 (09:08 +0000)
commit91295ff980c17efb3ad013b9636017b58e49c071
treea9e1d23baf777704579d3c1d348eebb6c88f7d71
parent67f5af9a4da49cd58b35d0f521266051715d9738
arch-arm: Correction for address size in EL1&0 translation

When doing EL0/1 translation in stage2, the
physical address size will be defined by the
hypervisor (via VTCR_EL2.ps, not TCR.ips).

See D10.2.121 of the ARM ARM.

Change-Id: Ic7df97c0f5950a648f7408cde3955a640b562c1d
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/12552
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
src/arch/arm/miscregs.hh
src/arch/arm/table_walker.cc