verilog: check entire user type stack for type definition
authorXiretza <xiretza@xiretza.xyz>
Thu, 18 Mar 2021 20:53:02 +0000 (21:53 +0100)
committerZachary Snow <zachary.j.snow@gmail.com>
Sun, 21 Mar 2021 23:35:13 +0000 (19:35 -0400)
commit92d5550a90558a0292c8ac63cecabb2de30eb6aa
tree58ed982822080494e7ca632c0e9c1d566f15fca2
parent4f4e70876f06738fa7dda24e01ac296fe318264a
verilog: check entire user type stack for type definition
frontends/verilog/verilog_parser.y
tests/svtypes/typedef_scopes.sv