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(parent: ae6ef92) | patch
targets: always use sys_clk_freq on SDRAM modules.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 21 Mar 2020 18:36:06 +0000 (19:36 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 21 Mar 2020 18:36:06 +0000 (19:36 +0100)
commit930679efd7ed113c1d01543e8a617ea13e0af4a0
treee588520ffd5c5c1f809301b47ba0751a05df4605tree
parentae6ef923afc0e9832acae88492b748c601755049commit | diff
targets: always use sys_clk_freq on SDRAM modules.
litex/boards/targets/de0nano.py diff | blob | history
litex/boards/targets/genesys2.py diff | blob | history