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(parent: b13b1bc) | patch
x86: re-work operand handling for 5-operand XOP insns
authorJan Beulich <jbeulich@suse.com>
Wed, 8 Jul 2020 09:02:40 +0000 (11:02 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 8 Jul 2020 09:02:40 +0000 (11:02 +0200)
commit93abb1468ea24f721b2ed025118f4b4412900b37
tree1ea662b1c30a00dd9fa3affe57e37ae3291f7082tree
parentb13b1bc05435d2b8b2f1a0f48eba127a7c99fbb4commit | diff
x86: re-work operand handling for 5-operand XOP insns

There's no need for custom operand handling here, except for the VEX.W
controlled operand swapping and the printing of the remaining 4-bit
immediate. VEX.W can be handled just like 4-operand insns.

Also take the opportunity and drop the stray indirection through
vex_w_table[].
opcodes/ChangeLog diff | blob | history
opcodes/i386-dis.c diff | blob | history