Changed a lot of code to the new RTLIL::Wire constructors
authorClifford Wolf <clifford@clifford.at>
Sat, 26 Jul 2014 18:12:50 +0000 (20:12 +0200)
committerClifford Wolf <clifford@clifford.at>
Sat, 26 Jul 2014 18:12:50 +0000 (20:12 +0200)
commit946ddff9cef3ea0b4dad8664319fb13074133775
treee35f5ebe3cd76a8e10fe945872e32c2ed3a7d815
parentd49dec1f861ce11a87c48cc21c8edc1755802a5f
Changed a lot of code to the new RTLIL::Wire constructors
19 files changed:
frontends/ast/genrtlil.cc
frontends/ilang/parser.y
kernel/rtlil.cc
kernel/rtlil.h
passes/abc/abc.cc
passes/abc/blifparse.cc
passes/cmds/add.cc
passes/cmds/delete.cc
passes/cmds/scatter.cc
passes/cmds/splitnets.cc
passes/fsm/fsm_extract.cc
passes/fsm/fsm_map.cc
passes/hierarchy/hierarchy.cc
passes/hierarchy/submod.cc
passes/memory/memory_dff.cc
passes/memory/memory_map.cc
passes/opt/opt_clean.cc
passes/proc/proc_mux.cc
passes/sat/miter.cc