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(parent: ada2fe4) | patch
[xcc,opcodes,pk,sim] cleanup to FP ISA
authorAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Wed, 2 Feb 2011 07:22:54 +0000 (23:22 -0800)
committerAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Wed, 2 Feb 2011 07:22:54 +0000 (23:22 -0800)
commit94dc73b7f100270d7a6dff912ea985c9204e3fc1
tree18653ce2b7f84b35e632bfd70846144b023b68datree
parentada2fe414b30e7a4a568401663cd070cf7b60076commit | diff
[xcc,opcodes,pk,sim] cleanup to FP ISA

- Added 5th rounding mode
- Removed MFCR/MTCR in favor of MFFSR/MTFSR (it was the only CR...)
- merged MTF.D with MTFLH.D; operation depends on RV32/RV64 mode
- made MFFL.D and MFFH.D illegal in RV64
riscv/decode.h diff | blob | history
riscv/execute.h diff | blob | history
riscv/insns/mfcr.h [deleted file] blob | history
riscv/insns/mffh_d.h diff | blob | history
riscv/insns/mffl_d.h diff | blob | history
riscv/insns/mffsr.h [new file with mode: 0644] blob
riscv/insns/mtcr.h [deleted file] blob | history
riscv/insns/mtf_d.h diff | blob | history
riscv/insns/mtflh_d.h [deleted file] blob | history
riscv/insns/mtfsr.h [new file with mode: 0644] blob
Simple-V augmented version of spike