Fix Verilator sim warnings: 1 BLKSEQ and 3 WIDTH
authorXark <Xark@XarkLabs.com>
Sun, 14 Jun 2020 07:45:22 +0000 (00:45 -0700)
committerXark <Xark@XarkLabs.com>
Sun, 14 Jun 2020 07:45:22 +0000 (00:45 -0700)
commit9509444ef2a55dcd75a6f5e1d96337f442238cee
tree02d6ba48fbcb13b469f23818767d7389ae3e9205
parent74e93e083ff23f3381fe2409e5847f9843840b17
Fix Verilator sim warnings: 1 BLKSEQ and 3 WIDTH
techlibs/ice40/cells_sim.v