synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2
authorEddie Hung <eddie@fpgeh.com>
Thu, 19 Sep 2019 21:58:06 +0000 (14:58 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 19 Sep 2019 21:58:06 +0000 (14:58 -0700)
commit95db2489bdb515a2e9d3a995574adc8c1071d3c0
treea5b34f8630a5a940a37f278ddd20b7816394d182
parent3b9b0fcd0630133092b23a18453eb420534b2369
synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2
techlibs/xilinx/synth_xilinx.cc