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Re: [libre-riscv-dev] processor and soc naming
authorJacob Lifshay <programmerjake@gmail.com>
Wed, 11 Mar 2020 21:21:42 +0000 (14:21 -0700)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Wed, 11 Mar 2020 21:21:55 +0000 (21:21 +0000)
commit962c8ae428958c47613e90f2ff7a7e2ccedb1c10
tree0702e618e7f2f8a05c6bb98bebd6aca068e1e783tree
parent2285445aa3b35ecb9d96208f15d95d5b5f60d17acommit | diff
Re: [libre-riscv-dev] processor and soc naming
b2/ad9f9cccfa50e0029e78a1269cea8a4e84c937 [new file with mode: 0644] blob
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