cpu: Change writeback modeling for outstanding instructions
authorMitch Hayenga <mitch.hayenga@arm.com>
Wed, 3 Sep 2014 11:42:33 +0000 (07:42 -0400)
committerMitch Hayenga <mitch.hayenga@arm.com>
Wed, 3 Sep 2014 11:42:33 +0000 (07:42 -0400)
commit976f27487b57e968a326752fcf74747427733df6
tree16c9e61f702f21d82948b1f5b555ef1b7c543b15
parentfd722946dd723bda5bd4aea5eedbda108141a550
cpu: Change writeback modeling for outstanding instructions

As highlighed on the mailing list gem5's writeback modeling can impact
performance.  This patch removes the limitation on maximum outstanding issued
instructions, however the number that can writeback in a single cycle is still
respected in instToCommit().
configs/common/O3_ARM_v7a.py
src/cpu/o3/O3CPU.py
src/cpu/o3/iew.hh
src/cpu/o3/iew_impl.hh
src/cpu/o3/inst_queue_impl.hh
src/cpu/o3/lsq_unit.hh
src/cpu/o3/lsq_unit_impl.hh