opcodes: Add non-enum disassembler options
authorTsukasa OI <research_trasio@irq.a4lg.com>
Tue, 30 Aug 2022 12:20:30 +0000 (12:20 +0000)
committerTsukasa OI <research_trasio@irq.a4lg.com>
Tue, 6 Sep 2022 02:23:21 +0000 (02:23 +0000)
commit9869e2e5c7964039328013a283461d1826dbf96c
tree7af4afced2735841646fa1fe52a05f23e998b7ad
parenta49fdb49c8d6bb2a2c2d200ea9e83ae688e67e22
opcodes: Add non-enum disassembler options

This is paired with "gdb: Add non-enum disassembler options".

There is a portable mechanism for disassembler options and used on some
architectures:

-   ARC
-   Arm
-   MIPS
-   PowerPC
-   RISC-V
-   S/390

However, it only supports following forms:

-   [NAME]
-   [NAME]=[ENUM_VALUE]

Valid values for [ENUM_VALUE] must be predefined in
disasm_option_arg_t.values. For instance, for -M cpu=[CPU] in ARC
architecture, opcodes/arc-dis.c builds valid CPU model list from
include/elf/arc-cpu.def.

In this commit, it adds following format:

-   [NAME]=[ARBITRARY_VALUE] (cannot contain "," though)

This is identified by NULL value of disasm_option_arg_t.values
(normally, this is a non-NULL pointer to a NULL-terminated list).

include/ChangeLog:

* dis-asm.h (disasm_option_arg_t): Update comment of values
to allow non-enum disassembler options.

opcodes/ChangeLog:

* riscv-dis.c (print_riscv_disassembler_options): Support
non-enum disassembler options on printing disassembler help.
* arc-dis.c (print_arc_disassembler_options): Likewise.
* mips-dis.c (print_mips_disassembler_options): Likewise.
include/dis-asm.h
opcodes/arc-dis.c
opcodes/mips-dis.c
opcodes/riscv-dis.c