or1k: add support for l.swa/l.lwa atomic instructions
authorStefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Thu, 8 May 2014 05:53:09 +0000 (08:53 +0300)
committerStefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Thu, 8 May 2014 06:02:50 +0000 (09:02 +0300)
commit999b995ddc4a8a2f146ebf9a46c9924c6a7c65a6
tree668d90849443ac904a35a71a867e08a0484a8de9
parentefefdd63628d540f3ad513b2bb2036dfc53f00a8
or1k: add support for l.swa/l.lwa atomic instructions

This adds support for the load-link/store-conditional
l.lwa/l.swa atomic instructions.
The support is added in such way, that the cpu description not
only describes the mnemonics, but also the functionality.

A couple of fixes to typos in nearby/related code are also snuck
into this.

cpu/
* or1korbis.cpu (h-atomic-reserve): New hardware.
(h-atomic-address): Likewise.
(insn-opcode): Add opcodes for LWA and SWA.
(atomic-reserve): New operand.
(atomic-address): Likewise.
(l-lwa, l-swa): New instructions.
(l-lbs): Fix typo in comment.
(store-insn): Clear atomic reserve on store to atomic-address.
Fix register names in fmt field.

opcodes/
* or1k-desc.c: Regenerated.
* or1k-desc.h: Likewise.
* or1k-opc.c: Likewise.
* or1k-opc.h: Likewise.
* or1k-opinst.c: Likewise.
cpu/ChangeLog
cpu/or1korbis.cpu
opcodes/ChangeLog
opcodes/or1k-desc.c
opcodes/or1k-desc.h
opcodes/or1k-opc.c
opcodes/or1k-opc.h
opcodes/or1k-opinst.c