sim: drive clock signals
authorSebastien Bourdeauducq <sb@m-labs.hk>
Mon, 21 Sep 2015 13:52:13 +0000 (21:52 +0800)
committerSebastien Bourdeauducq <sb@m-labs.hk>
Mon, 21 Sep 2015 13:53:41 +0000 (21:53 +0800)
commit99af825a5aa654bd7870ad701eaf0d9a916b231c
tree465b6ea65e51a0994e92e9866ad427237f81a214
parenta67b4baa0c7eae75217751bd9fea2afcf30d4af8
sim: drive clock signals
migen/sim/core.py