radeonsi: enable CU0 in each SE for LS-HS execution
authorMarek Olšák <marek.olsak@amd.com>
Tue, 28 Jun 2016 11:15:45 +0000 (13:15 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 29 Jun 2016 14:34:22 +0000 (16:34 +0200)
commit9a71bf88582164413a021a2fc26c894512bd52af
treee8a0529f94aecd3129146a61f76abd8f69e3f305
parent4b11ef23b4c064a6db5fae313b4e2e6bf027c7e1
radeonsi: enable CU0 in each SE for LS-HS execution

Offchip-only tessellation allows this.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_state.c