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[AArch64][PATCH 2/2] Combine AES instructions with xor and zero operands
authorAndre Vieira <andre.simoesdiasvieira@arm.com>
Thu, 21 Jun 2018 09:08:43 +0000 (09:08 +0000)
committerAndre Vieira <avieira@gcc.gnu.org>
Thu, 21 Jun 2018 09:08:43 +0000 (09:08 +0000)
commit9b57fd3d96f312194b49fb4774dd2ce075ef5c17
treed41a355d938e568d5295b935212277cda8feb385tree
parentff02988392adfa1514e9c3495731b719f5228d5bcommit | diff
[AArch64][PATCH 2/2] Combine AES instructions with xor and zero operands

gcc
2018-06-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* config/aarch64/aarch64-simd.md
(*aarch64_crypto_aes<aes_op>v16qi_xor_combine): New.

gcc/testsuite
2018-06-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

* gcc/gcc.target/aarch64/aes_xor_combine.c: New test.

From-SVN: r261836
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/aarch64-simd.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/aarch64/aes_xor_combine.c [new file with mode: 0644] blob