arch-x86,cpu: Fix bpred by annotating branch instructions in x86
authorJuan M. Cebrian <jm.cebriangonzalez@gmail.com>
Tue, 21 Apr 2020 17:15:03 +0000 (19:15 +0200)
committerJuan Manuel Cebrián González <jm.cebriangonzalez@gmail.com>
Mon, 24 Aug 2020 16:20:06 +0000 (16:20 +0000)
commit9b8cc2f5c34e954341a7b12953da191a53c5a149
tree1dc34ac6e6d1b5a507c9d1b6447a2a7078d1638a
parent1009c9878ce0ba386fe1a87cf33c8bfad05b3b8c
arch-x86,cpu: Fix bpred by annotating branch instructions in x86

Original Creator: Adria Armejach.

Branch instructions needed to be annotated in x86 as direct/indirect and conditional/unconditional. These annotations where not present causing the branch predictor to misbehave, not using the BTB. In addition, logic to determine the real branch target at decode needed to be added as it was also missing.

Change-Id: I91e707452c1825b9bb4ae75c3f599da489ae5b9a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29154
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/x86/isa/insts/general_purpose/control_transfer/call.py
src/arch/x86/isa/insts/general_purpose/control_transfer/conditional_jump.py
src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py
src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py
src/arch/x86/isa/macroop.isa
src/arch/x86/isa/microops/regop.isa
src/arch/x86/isa/microops/seqop.isa
src/cpu/o3/decode_impl.hh