dev: Let the pixel pump bypass the DMA FIFO in non-caching mode.
authorGabe Black <gabe.black@gmail.com>
Thu, 24 Dec 2020 15:53:57 +0000 (07:53 -0800)
committerGabe Black <gabe.black@gmail.com>
Wed, 13 Jan 2021 23:23:59 +0000 (23:23 +0000)
commit9c7cc711bcb35cd7938bb133382f45bf13d10cbc
treeefa991cd3b0343e2652dd963a17558e191d0cb66
parent5a124c2d865907852e6d0e7d22080517e470c700
dev: Let the pixel pump bypass the DMA FIFO in non-caching mode.

When in non-caching mode, performance metrics are not meaningful, and
we're just interested in functional level behavior. Going through the
DMA FIFO in the HDLCD controller is very inefficient, and prevents
reading a batch of pixels from memory all in one go.

Change-Id: I3fb6d4d06730b5a94b5399f01aa02186baa5c9b3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38721
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/hdlcd.cc
src/dev/arm/hdlcd.hh
src/dev/pixelpump.cc
src/dev/pixelpump.hh