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(parent: 8c16c9c) | patch
i965/fs: Use align1 mode on ternary instructions on Gen10+
authorMatt Turner <mattst88@gmail.com>
Wed, 14 Jun 2017 21:48:11 +0000 (14:48 -0700)
committerMatt Turner <mattst88@gmail.com>
Fri, 20 Oct 2017 22:00:17 +0000 (15:00 -0700)
commit9cd60fce9c22737000a8f8dc711141f8a523fe75
tree6fe5f98dc1d229cf39817f241a58e38a7540df80tree
parent8c16c9c677087f0b4eb2160a28d0fbd66202df86commit | diff
i965/fs: Use align1 mode on ternary instructions on Gen10+

Align1 mode offers some nice features over align16, like access to more
data types and the ability to use a 16-bit immediate. This patch does
not start using any new features. It just emits ternary instructions in
align1 mode.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
src/intel/compiler/brw_fs_generator.cpp diff | blob | history