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(parent: c917dce) | patch
work through the CSns to give the appearance of having a larger hyperram
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 28 Mar 2022 14:12:25 +0000 (15:12 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 28 Mar 2022 14:12:25 +0000 (15:12 +0100)
commit9d99f237c42bf503a89f2f7bbf08a33dee5ae014
tree7857ba851e24c23c4116328866039deabeed7f51tree
parentc917dce421110da9a14597dc680f237dac454f29commit | diff
work through the CSns to give the appearance of having a larger hyperram
memory when in fact, when one IC runs out of address space the next
one is activated.  this is not particularly fast but it is simple
and functional
lambdasoc/periph/hyperram.py diff | blob | history