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(parent: afee7b2) | patch
add option for adding synthesis attributes to the Memory behind
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 19 Feb 2022 10:49:53 +0000 (10:49 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 19 Feb 2022 10:49:53 +0000 (10:49 +0000)
commit9df6def5bdebee328422f2205ba727a519567e02
tree12170977ecd0c42a3f3ce39cd17b61398100ff38tree
parentafee7b221e9fcd2f42824da1d66632e8c556eae0commit | diff
add option for adding synthesis attributes to the Memory behind
ASyncFIFO and SyncFIFOBuffered as well
nmigen/lib/fifo.py diff | blob | history