Re: [libre-riscv-dev] effects of powered-off chip sections on current leakage
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 14 Jun 2020 11:30:21 +0000 (12:30 +0100)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Sun, 14 Jun 2020 11:30:55 +0000 (12:30 +0100)
commit9ef073d49b2aa27b4a99227d491f17e428218570
treeff7580f05a87f22b2c952b541159e24a45c34f1e
parent8cc5265883c06eed323d378241053012b873f127
Re: [libre-riscv-dev] effects of powered-off chip sections on current leakage
b9/08046da9939f81e79e5eb6e0832cdae55d6db9 [new file with mode: 0644]