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(parent: f699e91) | patch
mem-cache: Move Target to QueueEntry
authorDaniel R. Carvalho <odanrc@yahoo.com.br>
Wed, 30 Jan 2019 13:46:22 +0000 (14:46 +0100)
committerDaniel Carvalho <odanrc@yahoo.com.br>
Fri, 19 Apr 2019 16:34:00 +0000 (16:34 +0000)
commit9f32d74db86c8977ab16f2671830f6cdfe3c068b
treeb7dd3a867cbe1f7fc29fa68d8173160632523fdftree
parentf699e91fe53870b6a7f0e9fe61cc92fc44b1033bcommit | diff
mem-cache: Move Target to QueueEntry

WriteQueueEntry's target has 100% functionality overlap with MSHR's,
therefore make it base to MSHR::Target.

Change-Id: I48614e78179d708bd91bbe75a752e5a05146e8eb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17534
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
src/mem/cache/base.cc diff | blob | history
src/mem/cache/cache.cc diff | blob | history
src/mem/cache/mshr.hh diff | blob | history
src/mem/cache/noncoherent_cache.cc diff | blob | history
src/mem/cache/queue_entry.hh diff | blob | history
src/mem/cache/write_queue_entry.hh diff | blob | history