convert Logical svp64_cases.py to new vector reg form
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 6 Jul 2022 07:37:17 +0000 (08:37 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 6 Jul 2022 07:37:17 +0000 (08:37 +0100)
commit9f4fd0f7a613add6f11a7864794164f782f8ac87
treeb12ce3c686fd7ac2ca4543355a5bb92d4f63b38f
parentef743108db8f65fcb592b1fb70cc3b24be2826f2
convert Logical svp64_cases.py to new vector reg form
https://bugs.libre-soc.org/show_bug.cgi?id=884
src/openpower/decoder/isa/test_caller_svp64_logical.py [new file with mode: 0644]
src/openpower/test/logical/svp64_cases.py