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(parent: 8ced064) | patch
build/sim: adapt verilator simulation to new stream signals
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 7 Apr 2016 06:56:53 +0000 (08:56 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 7 Apr 2016 06:56:53 +0000 (08:56 +0200)
commit9fa9bdcf6850ddc0c3bd39fae593ed3f33207111
tree0a90f06eded41dfd1bef86e9d29ac7b46826b5a3tree
parent8ced064160170b9de6335d79eb9119fad70bb402commit | diff
build/sim: adapt verilator simulation to new stream signals
litex/boards/platforms/sim.py diff | blob | history
litex/build/sim/dut_tb.cpp diff | blob | history
litex/build/sim/verilator.py diff | blob | history
litex/soc/cores/uart/core.py diff | blob | history