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(parent: 8e1bf24) | patch
test: generate examples to verilog as part of unit tests.
authorwhitequark <cz@m-labs.hk>
Mon, 8 Jul 2019 10:12:15 +0000 (10:12 +0000)
committerwhitequark <cz@m-labs.hk>
Mon, 8 Jul 2019 10:12:26 +0000 (10:12 +0000)
commit9ffc7afb02c24eddfd6536fc44671b32965e7c98
treec0c6c98a53f2348a80d1015b9dff5ebebbdb98b8tree
parent8e1bf24dbf20600c4758fa62a644ebfebdec14a8commit | diff
test: generate examples to verilog as part of unit tests.

This is to make sure 806a62c2 doesn't happen again.
examples/basic/arst.py diff | blob | history
nmigen/test/test_examples.py [new file with mode: 0644] blob