x86: optimize EVEX packed integer logical instructions

x86: optimize EVEX packed integer logical instructions

As long as there's no write mask as well as no broadcast, and as long
as the scaled Disp8 wouldn't result in a shorter EVEX encoding, encode
VPAND{D,Q}, VPANDN{D,Q}, VPOR{D,Q}, and VPXOR{D,Q} acting on only the
lower 16 XMM/YMM registers using their VEX equivalents with -O1.

Also take the opportunity and avoid looping twice over all operands
when dealing with memory-with-displacement ones.