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i965/hsw: Change L3 MOCS of 3DSTATE_VERTEX_BUFFERS
authorChad Versace <chad.versace@linux.intel.com>
Thu, 18 Jul 2013 16:58:06 +0000 (09:58 -0700)
committerChad Versace <chad.versace@linux.intel.com>
Thu, 18 Jul 2013 23:18:21 +0000 (16:18 -0700)
commita16d47465ecdbaef0548207c1bc037493a67ebec
treed6b260f55bfe7ebf9b596f45ec8999d42de89de5tree
parenteb83079b35ec0a72e4c913c2c6a6f5a92a12bb9fcommit | diff
i965/hsw: Change L3 MOCS of 3DSTATE_VERTEX_BUFFERS

Change from "not cacheable" to "cacheable" in L3.
Do so for the draw upload path and blorp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
src/mesa/drivers/dri/i965/brw_draw_upload.c diff | blob | history
src/mesa/drivers/dri/i965/gen6_blorp.cpp diff | blob | history