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(parent: f2daded) | patch
nv50: align registers used with TEX to 4
authorChristoph Bumiller <e0425955@student.tuwien.ac.at>
Sat, 15 Aug 2009 14:22:27 +0000 (16:22 +0200)
committerChristoph Bumiller <e0425955@student.tuwien.ac.at>
Sat, 15 Aug 2009 14:22:27 +0000 (16:22 +0200)
commita2af40b846e0b510887aaf15c2777387a3caae62
treebcd09189a63f5d1a62aa5497a6bec5f5553aae97tree
parentf2daded8123c0d82e4cd29710a5b2dfcc99068a1commit | diff
nv50: align registers used with TEX to 4

The TEX instruction is passed the first index of a contiguous
range of 4 TEMP registers that contain coordinates / LOD and,
after execution, the texel values.
It seems the first index is required to be a multiple of 4 on
some (older ?) cards.
src/gallium/drivers/nv50/nv50_program.c diff | blob | history