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(parent: d7f06bc) | patch
Correct imul (r64) latency for modern Intel CPUs
authorMarkus Trippelsdorf <markus@trippelsdorf.de>
Sun, 17 Dec 2017 12:01:25 +0000 (12:01 +0000)
committerMarkus Trippelsdorf <trippels@gcc.gnu.org>
Sun, 17 Dec 2017 12:01:25 +0000 (12:01 +0000)
commita2ef9558d17aeb038cbc8a66a203f7a8e6c6e81e
treeb25c6818a61fd8d5752c2aa8a73c912df16c2234tree
parentd7f06bc3f7e1e1da11c065cc96a81f15bd0ca68fcommit | diff
Correct imul (r64) latency for modern Intel CPUs

Since Sandybridge the 64bit multiplication latency is three cycles, not
four. So update the costs to reflect reality.

* x86-tune-costs.h (skylake_cost, core_cost): Decrease r64 multiply
latencies.

* gcc.target/i386/wmul-3.c: New test.

From-SVN: r255760
gcc/ChangeLog diff | blob | history
gcc/config/i386/x86-tune-costs.h diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/i386/wmul-3.c [new file with mode: 0644] blob