xilinx/ecp5/ice40: add (* abc9_flop *) to bypass-able cells
authorEddie Hung <eddie@fpgeh.com>
Tue, 21 Apr 2020 21:13:38 +0000 (14:13 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 14 May 2020 17:33:56 +0000 (10:33 -0700)
commita323881e152c0d51728f3df773ac2f326544b379
treeef12adb4c3b88d682e15089680f92b134742ba5c
parentb3e2538a140cac36c32b133d4475a052cfc46809
xilinx/ecp5/ice40: add (* abc9_flop *) to bypass-able cells
techlibs/ecp5/cells_sim.v
techlibs/ice40/cells_sim.v
techlibs/xilinx/cells_sim.v