cpu: Allow creation of traffic gen from generic SimObjects
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 18 Jul 2018 13:28:21 +0000 (14:28 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 25 Jul 2018 16:47:15 +0000 (16:47 +0000)
commita327a6763a356dc386c0f273fe091784a20b495a
treeac7f4ef68fee25df16f5019f84f43d843f4105a6
parent2fe3d660260e7b546b5860ac4459014ed9bee907
cpu: Allow creation of traffic gen from generic SimObjects

This patch allows to instantiate a Traffic generator starting from a
generic SimObject, so that linking to a BaseTrafficGen only is no longer
mandatory. This permits SimObjects different than a BaseTrafficGen to
instantiate generators and to manually specify the MasterID they
will be using when generating memory requests.

Change-Id: Ic286cfa49fd9c9707e6f12a4ea19993dd3006b2b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11789
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/cpu/testers/traffic_gen/base.cc
src/cpu/testers/traffic_gen/base_gen.cc
src/cpu/testers/traffic_gen/base_gen.hh
src/cpu/testers/traffic_gen/dram_gen.cc
src/cpu/testers/traffic_gen/dram_gen.hh
src/cpu/testers/traffic_gen/dram_rot_gen.hh
src/cpu/testers/traffic_gen/exit_gen.hh
src/cpu/testers/traffic_gen/idle_gen.hh
src/cpu/testers/traffic_gen/linear_gen.hh
src/cpu/testers/traffic_gen/random_gen.hh
src/cpu/testers/traffic_gen/trace_gen.hh