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(parent: 1416db4) | patch
reduce fdmadds down to only 3 operands, RT-overwrite, to save on operand
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 28 Apr 2023 07:53:40 +0000 (08:53 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 2 Jun 2023 18:51:17 +0000 (19:51 +0100)
commita4537d93c3d1dd30c2e2035848e96a397eae65af
treeca19489b361bac9be24ae60bed5dcb441976be8ctree
parent1416db4c4bd7555de7555c8388152420360f2acecommit | diff
reduce fdmadds down to only 3 operands, RT-overwrite, to save on operand
space.  it is still 3-in 2-out but FRC is now FRA
openpower/isa/svfparith.mdwn diff | blob | history
openpower/isatables/RM-1P-3S1D.csv diff | blob | history
openpower/isatables/fields.text diff | blob | history
openpower/isatables/minor_59.csv diff | blob | history
src/openpower/decoder/isa/caller.py diff | blob | history
src/openpower/decoder/isa/test_caller_svp64_dct.py diff | blob | history
src/openpower/decoder/power_decoder2.py diff | blob | history
src/openpower/decoder/power_enums.py diff | blob | history
src/openpower/decoder/power_insn.py diff | blob | history
src/openpower/sv/sv_analysis.py diff | blob | history