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i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT
authorSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Thu, 25 Aug 2016 14:05:24 +0000 (16:05 +0200)
committerFrancisco Jerez <currojerez@riseup.net>
Fri, 14 Apr 2017 21:56:08 +0000 (14:56 -0700)
commita5399e8b1cc3e2e12b8aa067e8380d1b088c35ca
treebaf42e6a2b78f06eb592745419f7131969400e83tree
parentebfb703d443a4b22320c3f1eed34e6e1aa54e998commit | diff
i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT

The hardware applies the same channel enable signals to both halves of
the compressed instruction which will be just wrong under non-uniform
control flow. Fix this by splitting those instructions to SIMD4.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
src/intel/compiler/brw_fs.cpp diff | blob | history