utils/litex_sim: handle cpu_endianness for rom-init/ram-init
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 13 Mar 2019 09:56:09 +0000 (10:56 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 13 Mar 2019 09:56:09 +0000 (10:56 +0100)
commita549f0941be25cd7b329e492081c1d84cd9d3583
tree6c8ef5bec257274f1704b44358d2a48d53b99792
parent411bca790a6a263d994d724f8f366ce5d98e75cc
utils/litex_sim: handle cpu_endianness for rom-init/ram-init
litex/utils/litex_sim.py