correct wishbone data directions
authorTobias Platen <tplaten@posteo.de>
Mon, 4 Apr 2022 15:48:01 +0000 (17:48 +0200)
committerTobias Platen <tplaten@posteo.de>
Mon, 4 Apr 2022 15:48:01 +0000 (17:48 +0200)
commita66cb0e14098ff9cd20b9ce6cb6171757383981c
tree0f9d0ba0222decc23c4dc42dc9011f185c48e307
parent56fb307eb50a8485dbde0f4cbc28af5e976994a9
correct wishbone data directions
fpga/top-generic.vhdl
soc.vhdl