AArch64: Add half float view to V registers

AArch64: Add half float view to V registers

AArch64 can fill the vector registers with half precision floats.
Add a view for this.

Add builtin type ieee half and connect this to the existing
floatformats_ieee_half.

gdb/ChangeLog:

2019-05-14  Alan Hayward  <alan.hayward@arm.com>

	* aarch64-tdep.c (aarch64_vnh_type): Add half view.
	(aarch64_vnv_type): Likewise.
	* target-descriptions.c (make_gdb_type): Add TDESC_TYPE_IEEE_HALF.
	* common/tdesc.c: Likewise.
	* common/tdesc.h (enum tdesc_type_kind): Likewise.
	* features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerate.
	* features/aarch64-fpu.xml: Add ieee half view.
	* features/aarch64-sve.c (create_feature_aarch64_fpu): Likewise.
	* gdbtypes.c (gdbtypes_post_init): Add builtin_half
	* gdbtypes.h (struct builtin_type): Likewise.
	(struct objfile_type): Likewise.