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(parent: cd3c1b1) | patch
Turn on SEE unaligned load and store for Haswell
authorH.J. Lu <hongjiu.lu@intel.com>
Tue, 12 Nov 2013 13:52:08 +0000 (13:52 +0000)
committerH.J. Lu <hjl@gcc.gnu.org>
Tue, 12 Nov 2013 13:52:08 +0000 (05:52 -0800)
commita720b48e18470367633194fff2107ba0b131d3bb
treeb0df24bfc1dfe284eac97a5b72db64fd1d9a428ftree
parentcd3c1b1c7065fa81203bc3c0daf4e81104377e2acommit | diff
Turn on SEE unaligned load and store for Haswell

PR target/59088
* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL):
Set for m_HASWELL.
(X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Set for m_HASWELL.

From-SVN: r204701
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gcc/config/i386/x86-tune.def diff | blob | history