fhdl: allow a namespace to be specified for Verilog conversion
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 12 Dec 2011 23:24:40 +0000 (00:24 +0100)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 12 Dec 2011 23:24:40 +0000 (00:24 +0100)
commita72faaecddd7307e1b0d98da1c47baee20aaa73d
tree575405a056df1c6840db77c2a5f58b908222c51c
parenteee6980a366c669fb22aebd2a5dffaa2af16a103
fhdl: allow a namespace to be specified for Verilog conversion
migen/fhdl/verilog.py