x86: Move AESNI generation to Skylake and Goldmont
authorThiago Macieira <thiago.macieira@intel.com>
Thu, 30 Aug 2018 15:59:41 +0000 (15:59 +0000)
committerH.J. Lu <hjl@gcc.gnu.org>
Thu, 30 Aug 2018 15:59:41 +0000 (08:59 -0700)
commita73e818148ff2aa784a6691ec2d021ed07787e48
treeaf0016db3b0f6c5a9e73b142d8373fffc9bc9760
parent4e6a938029976924c3be5300e2d0caaae9d05c5d
x86: Move AESNI generation to Skylake and Goldmont

The instruction set first appeared with Westmere, but not all processors
in that and the next few generations have the instructions. According to
Wikipedia[1], the first generation in which all SKUs have AES
instructions are Skylake and Goldmont. I can't find any Skylake,
Kabylake, Kabylake-R or Cannon Lake currently listed at
https://ark.intel.com that says "IntelĀ® AES New Instructions" "No".

[1] https://en.wikipedia.org/wiki/AES_instruction_set

2018-08-30  Thiago Macieira  <thiago.macieira@intel.com>

* config/i386/i386.c (PTA_WESTMERE): Remove PTA_AES.
(PTA_SKYLAKE): Add PTA_AES.
(PTA_GOLDMONT): Likewise.

From-SVN: r263989
gcc/ChangeLog
gcc/config/i386/i386.c