RISC-V: xtheadfmemidx: Use fp register in mnemonics
authorChristoph Müllner <christoph.muellner@vrull.eu>
Mon, 7 Nov 2022 12:46:20 +0000 (13:46 +0100)
committerNelson Chu <nelson@rivosinc.com>
Wed, 9 Nov 2022 02:46:07 +0000 (10:46 +0800)
commita8d181c0fdae61f788d0332e3d9c0cff4b80eaa5
treed70eba660f01201cbdc2241537d984b82a1e392c
parent1db13039a7c410e89f00e379fe874d8532385e41
RISC-V: xtheadfmemidx: Use fp register in mnemonics

Although the encoding for scalar and fp registers is identical,
we should follow common pratice and use fp register names
when referencing fp registers.

The xtheadmemidx extension consists of indirect load/store instructions
which all load to or store from fp registers.
Let's use fp register names in this case and adjust the test cases
accordingly.

gas/
    * testsuite/gas/riscv/x-thead-fmemidx-fail.l: Updated since rd need to
    be float register.
    * testsuite/gas/riscv/x-thead-fmemidx-fail.s: Likewise.
    * testsuite/gas/riscv/x-thead-fmemidx.d: Likewise.
    * testsuite/gas/riscv/x-thead-fmemidx.s: Likewise.
opcodes/
    * riscv-opc.c (riscv_opcodes): Updated since rd need to be float register.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gas/testsuite/gas/riscv/x-thead-fmemidx-fail.l
gas/testsuite/gas/riscv/x-thead-fmemidx-fail.s
gas/testsuite/gas/riscv/x-thead-fmemidx.d
gas/testsuite/gas/riscv/x-thead-fmemidx.s
opcodes/riscv-opc.c