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(parent: c69da41) | patch
ld/st mismatch in power_insn.py and sv_analysis.py
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 15 May 2023 15:37:26 +0000 (16:37 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 2 Jun 2023 18:51:18 +0000 (19:51 +0100)
commita9b1022cede509b07e94b7d1f6fdcf8bc657d60f
tree18713e39433b0faa7b6c636e3c4e3574c4631e72tree
parentc69da41a46961c37a2faea8551ccd24934b150d0commit | diff
ld/st mismatch in power_insn.py and sv_analysis.py
some EXTRA slots run empty now due to source/dest being the same
register (s:RA;d:RA)
openpower/isatables/LDSTRM-2P-2S1D.csv diff | blob | history
src/openpower/decoder/power_insn.py diff | blob | history
src/openpower/sv/sv_analysis.py diff | blob | history