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(parent: 8901e84) | patch
orangecrab: add Orange Crab r0.2 target
authorMatt Johnston <matt@codeconstruct.com.au>
Wed, 11 Aug 2021 05:11:57 +0000 (13:11 +0800)
committerMatt Johnston <matt@codeconstruct.com.au>
Mon, 17 Jan 2022 04:55:14 +0000 (12:55 +0800)
commita9b467f43bae80b53d94b9067fe129651745d76a
treee2e68016b0a92897b90101d6c3c1a2d2de888de8tree
parent8901e84d8dcc1cee2bc1af7382b05e74f22d65c7commit | diff
orangecrab: add Orange Crab r0.2 target

top-orangecrab0.2 is a copy of top-arty with various changes.
USRMCLK is added for the SPI clock
ethernet is removed

Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
Makefile diff | blob | history
constraints/orange-crab-0.2.lpf [new file with mode: 0644] blob
fpga/top-orangecrab0.2.vhdl [new file with mode: 0644] blob