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(parent: d4b2cc5) | patch
* d10v_sim.h (SEXT56): Define.
authorAndrew Cagney <cagney@redhat.com>
Wed, 3 Dec 1997 08:03:33 +0000 (08:03 +0000)
committerAndrew Cagney <cagney@redhat.com>
Wed, 3 Dec 1997 08:03:33 +0000 (08:03 +0000)
commitaa49c64f3e93a777b3938daac491bbc983f93cf4
tree22491077b0399a55a1ef41a72d8429d243afbec0tree
parentd4b2cc56c066eb021f9873867893f0f408ec8d5dcommit | diff
* d10v_sim.h (SEXT56): Define.
* simops.c (OP_4201): For "rac", sign extend 56 bit value before
it is shifted.
* d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
SIGNED64 macro.
sim/d10v/ChangeLog diff | blob | history
sim/d10v/d10v_sim.h diff | blob | history
sim/d10v/simops.c diff | blob | history
sim/testsuite/d10v-elf/.Sanitize diff | blob | history
sim/testsuite/d10v-elf/ChangeLog diff | blob | history
sim/testsuite/d10v-elf/Makefile.in diff | blob | history
sim/testsuite/d10v-elf/t-macros.i [new file with mode: 0644] blob
sim/testsuite/d10v-elf/t-rac.s [new file with mode: 0644] blob
sim/testsuite/d10v-elf/t-rep.s [new file with mode: 0644] blob