git.libre-soc.org Git - gem5.git/commit

author	Nilay Vaish <nilay@cs.wisc.edu>
	Tue, 28 Jul 2015 06:58:04 +0000 (01:58 -0500)
committer	Nilay Vaish <nilay@cs.wisc.edu>
	Tue, 28 Jul 2015 06:58:04 +0000 (01:58 -0500)
commit	aafa5c3f86ea54f5e6e88009be656aeec12eef5f
tree	d40f2fd8a807ddc9638f292205754f9ecf19b6ef	tree
parent	608641e23c7f2288810c3f23a1a63790b664f2ab	commit \| diff

revert 5af8f40d8f2c

55 files changed:

src/arch/SConscript		diff \| blob \| history
src/arch/alpha/isa.hh		diff \| blob \| history
src/arch/alpha/registers.hh		diff \| blob \| history
src/arch/alpha/utility.cc		diff \| blob \| history
src/arch/arm/insts/static_inst.cc		diff \| blob \| history
src/arch/arm/isa.hh		diff \| blob \| history
src/arch/arm/registers.hh		diff \| blob \| history
src/arch/arm/utility.cc		diff \| blob \| history
src/arch/isa_parser.py		diff \| blob \| history
src/arch/mips/isa.hh		diff \| blob \| history
src/arch/mips/registers.hh		diff \| blob \| history
src/arch/mips/utility.cc		diff \| blob \| history
src/arch/null/registers.hh		diff \| blob \| history
src/arch/power/insts/static_inst.cc		diff \| blob \| history
src/arch/power/isa.hh		diff \| blob \| history
src/arch/power/registers.hh		diff \| blob \| history
src/arch/power/utility.cc		diff \| blob \| history
src/arch/sparc/isa.hh		diff \| blob \| history
src/arch/sparc/registers.hh		diff \| blob \| history
src/arch/sparc/utility.cc		diff \| blob \| history
src/arch/x86/insts/static_inst.cc		diff \| blob \| history
src/arch/x86/isa.hh		diff \| blob \| history
src/arch/x86/registers.hh		diff \| blob \| history
src/arch/x86/utility.cc		diff \| blob \| history
src/cpu/StaticInstFlags.py		diff \| blob \| history
src/cpu/base_dyn_inst.hh		diff \| blob \| history
src/cpu/checker/cpu.hh		diff \| blob \| history
src/cpu/checker/cpu_impl.hh		diff \| blob \| history
src/cpu/checker/thread_context.hh		diff \| blob \| history
src/cpu/exec_context.hh		diff \| blob \| history
src/cpu/minor/dyn_inst.cc		diff \| blob \| history
src/cpu/minor/exec_context.hh		diff \| blob \| history
src/cpu/minor/scoreboard.cc		diff \| blob \| history
src/cpu/minor/scoreboard.hh		diff \| blob \| history
src/cpu/o3/O3CPU.py		diff \| blob \| history
src/cpu/o3/cpu.cc		diff \| blob \| history
src/cpu/o3/cpu.hh		diff \| blob \| history
src/cpu/o3/dyn_inst.hh		diff \| blob \| history
src/cpu/o3/free_list.hh		diff \| blob \| history
src/cpu/o3/inst_queue_impl.hh		diff \| blob \| history
src/cpu/o3/regfile.cc		diff \| blob \| history
src/cpu/o3/regfile.hh		diff \| blob \| history
src/cpu/o3/rename_impl.hh		diff \| blob \| history
src/cpu/o3/rename_map.cc		diff \| blob \| history
src/cpu/o3/rename_map.hh		diff \| blob \| history
src/cpu/o3/thread_context.hh		diff \| blob \| history
src/cpu/o3/thread_context_impl.hh		diff \| blob \| history
src/cpu/reg_class.cc		diff \| blob \| history
src/cpu/reg_class.hh		diff \| blob \| history
src/cpu/simple/base.hh		diff \| blob \| history
src/cpu/simple_thread.hh		diff \| blob \| history
src/cpu/static_inst.hh		diff \| blob \| history
src/cpu/thread_context.cc		diff \| blob \| history
src/cpu/thread_context.hh		diff \| blob \| history
src/sim/insttracer.hh		diff \| blob \| history

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