[AArch64][5/10] ARMv8.2-A FP16 lane vector intrinsics
authorJiong Wang <jiong.wang@arm.com>
Mon, 25 Jul 2016 14:49:57 +0000 (14:49 +0000)
committerJiong Wang <jiwang@gcc.gnu.org>
Mon, 25 Jul 2016 14:49:57 +0000 (14:49 +0000)
commitab2e8f01f1bc926ba403ea16f1663c95aa1a3c66
treeedb585c6d9bbaef6323ece41c3b3b8d226bdd120
parent89ed6d5f5e9207087bde180bb4ed2be8a8b39787
[AArch64][5/10] ARMv8.2-A FP16 lane vector intrinsics

gcc/
* config/aarch64/aarch64-simd.md (*aarch64_mulx_elt_to_64v2df): Rename to
"*aarch64_mulx_elt_from_dup<mode>".
(*aarch64_mul3_elt<mode>): Update schedule type.
(*aarch64_mul3_elt_from_dup<mode>): Likewise.
(*aarch64_fma4_elt_from_dup<mode>): Likewise.
(*aarch64_fnma4_elt_from_dup<mode>): Likewise.
* config/aarch64/iterators.md (VMUL): Supprt half precision float modes.
(f, fp): Support HF modes.
* config/aarch64/arm_neon.h (vfma_lane_f16, vfmaq_lane_f16,
vfma_laneq_f16, vfmaq_laneq_f16, vfma_n_f16, vfmaq_n_f16, vfms_lane_f16,
        vfmsq_lane_f16, vfms_laneq_f16, vfmsq_laneq_f16, vfms_n_f16,
vfmsq_n_f16, vmul_lane_f16, vmulq_lane_f16, vmul_laneq_f16,
vmulq_laneq_f16, vmul_n_f16, vmulq_n_f16, vmulx_lane_f16,
vmulxq_lane_f16, vmulx_laneq_f16, vmulxq_laneq_f16): New.

From-SVN: r238719
gcc/ChangeLog
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/arm_neon.h
gcc/config/aarch64/iterators.md