Use ABC to convert from AIGER to Verilog
authorEddie Hung <eddie@fpgeh.com>
Fri, 7 Jun 2019 18:06:57 +0000 (11:06 -0700)
committerEddie Hung <eddie@fpgeh.com>
Fri, 7 Jun 2019 18:06:57 +0000 (11:06 -0700)
commitabc40924ed5dc4aba91c7f1e83ca90f54e9eb455
tree937476067fef6b0931a63a83ef73c0add3eb0d47
parentebe29b66593414d0317879359d1f1d1f61a9ecc4
Use ABC to convert from AIGER to Verilog
tests/tools/autotest.sh