arch-arm: ARMv8.3 CompNum, SIMD complex number support
authorJordi Vaquero <jordi.vaquero@metempsy.com>
Fri, 27 Mar 2020 11:04:12 +0000 (12:04 +0100)
committerJordi Vaquero <jordi.vaquero@metempsy.com>
Mon, 30 Mar 2020 11:13:27 +0000 (11:13 +0000)
commitae69a12b3bd40bc86997c96cac9239f2f973aa95
treedea0361cfd0cc5f50f47e7d1f5cbb2cbb426a2d3
parentf41abbdb5cf5c67233f3d730885d43517969afda
arch-arm: ARMv8.3 CompNum, SIMD complex number support

This patch implements the CompNum SIMD instruction for armv8.3.
This instructions are Fcadd, Fcmla(vector and element) and
Vcadd, Vcmla ( vector and element).

+ isa/decoder/thumb.isa: Decoding changes for SIMD instructions in T32
+ isa/formats/fp.isa: Decoding changes for SIMD instructions in A32
+ isa/formats/uncond.isa: Decoding changes for SIMD instructions in A32
+ isa/formats/aarch64.isa: Decoding changes for SIMD instructions in A64
+ isa/formats/neon64.isa: Decoding changes for SIMD instructions in A64
+ isa/insts/neon.isa: Vcadd, Vcmla instruction implementation
+ isa/insts/neon64.isa: Fcadd, Fcmla instruction implementation
+ isa/templates/neon.isa: Modify templates for adding byElement support

Change-Id: I7f11ce88137dad077d2cad698dcaa9a79a3f317b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27183
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
src/arch/arm/ArmISA.py
src/arch/arm/isa/decoder/thumb.isa
src/arch/arm/isa/formats/aarch64.isa
src/arch/arm/isa/formats/fp.isa
src/arch/arm/isa/formats/neon64.isa
src/arch/arm/isa/formats/uncond.isa
src/arch/arm/isa/insts/neon.isa
src/arch/arm/isa/insts/neon64.isa
src/arch/arm/isa/templates/neon.isa