x86-64: honor vendor specifics for near RET
authorJan Beulich <jbeulich@suse.com>
Thu, 30 Jan 2020 10:36:33 +0000 (11:36 +0100)
committerJan Beulich <jbeulich@suse.com>
Thu, 30 Jan 2020 10:36:33 +0000 (11:36 +0100)
commitaeab2b26dbea33221db4debaf31c97277cfaea5e
treeea035fa04bc87aab42f5381626f3a213273fc992
parent873494c89fb44747c7514687da25fc163c791b84
x86-64: honor vendor specifics for near RET

While vendors agree about default operand size (64 bits) and hence
unavilability of a 32-bit form, AMD honors a 16-bit operand size
override (0x66) while Intel doesn't.
12 files changed:
gas/ChangeLog
gas/testsuite/gas/i386/ilp32/x86-64-branch.d
gas/testsuite/gas/i386/x86-64-branch-2.d
gas/testsuite/gas/i386/x86-64-branch-2.s
gas/testsuite/gas/i386/x86-64-branch-4.l
gas/testsuite/gas/i386/x86-64-branch-4.s
gas/testsuite/gas/i386/x86-64-branch.d
gas/testsuite/gas/i386/x86-64-branch.s
opcodes/ChangeLog
opcodes/i386-dis.c
opcodes/i386-opc.tbl
opcodes/i386-tbl.h