cores/clock: simplify Fractional Divide support on S7MMCM.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 13 Mar 2020 14:51:18 +0000 (15:51 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 13 Mar 2020 14:56:39 +0000 (15:56 +0100)
commitaec1bfbeb477960a933345fd3fdf118ac2ffc945
treeccd38d9612af7649f595fec4f724ca46edc51837
parentf34593a17dab7ebe491d9e04dfa9c94c6a7ea753
cores/clock: simplify Fractional Divide support on S7MMCM.

Specific clkoutn_divide_range can now be provided by specialized XilinxClocking classes.
When provided, the specific range will be used. Floats are also now supported in the
range definition/iteration.
litex/soc/cores/clock.py